The transmittance of pixels in an LCD panel is determined by an analog voltage applied on the corresponding pixel electrodes. For example, in case of a typical twisted nematic optical configuration with crossed polarizers, a voltage difference of 5 Volt across the pixel electrodes results in a black state for the pixel, whereas a voltage difference of 1 Volt or lower, results in a white state for the pixel. The pixel voltages are generated by supplying the required voltage levels on the source bus lines (also known as data lines) which are connected to the pixel electrodes via Thin Film Transistors (TFTs). Conventionally, after a long settling time as determined by the resulting RC-time of source bus line/TFT/pixel structure, the voltage on the source bus line is “copied” onto the pixel electrode.
Before the analog voltage can be supplied on the source bus line, the original digital input signal needs to be converted to an analog voltage level by using a Digital-to-Analog Converter (DAC). The DAC can be positioned on a driver IC, e.g. for a-Si panels, but the DAC can also be positioned on an array glass of the LCD panel, e.g. in case of highly integrated Low Temperature Poly Silicon (LTPS) panels.
Disadvantages of the above-mentioned DAC implementations are:
1. The required minimum charging time is limited by the RC time of the source bus line/TFT/pixel structure. An increase of the panel resolution to, e.g. QVGA or higher, further reduces the available pixel charging time which can lead to incorrect pixel voltage levels (i.e. the pixels do not charge completely up to a required voltage level). In case of LTPS panels, increasing the multiplexing rate, e.g. from 1:3 to 1:6, can further reduce the available pixel charging time.
2. Implementing the DAC on the array glass requires quite a large area which increases the panel outline and consequently the module outline. Because customers will require modules with a smaller footprint, the required DAC area is a limiting bottleneck. Besides, a larger panel outline may reduce the number of panels per bipane increasing the panel cost.
3. Implementing the DAC in the driver IC increases the required voltage levels of the IC and consequently such will increase the IC-cost. For example, the maximum DAC output will typically be around ˜5V, whereas the maximum voltage available in a low cost digital submicron IC (e.g. 0.13 or 0.18 μm) is typically less than 2.5 V.